Comments on: This CXL Memory Controller Has 16 Arm Cores Marvell Structera A

By: Kevin G

Kevin G — Tue, 17 Dec 2024 14:46:21 +0000

@Name
Optane never got to flex it’s full potential due to fundamental software changes necessary. It has the opportunity to merge the idea of separate working execution memory and long term storage memory. Thus to do any work on a system it first has to be copied. Optane would permit the removal of that step. Loading files for a program would simply be remapping address spaces from a file system to application memory. Instead we just got long term storage on the memory bus or slower/higher capacity working memory space out of Optane which is fine for initial launch but far short of its potential as a technology.

I do not think CXL is going to go away and it wouldn’t surprise me if some company choses to leverage only CXL memory as its main source of bulk memory (ie to supplement on package HBM etc.) as a means of simplifying socket layouts. While not CXL, IBM is currently doing something similar with their POWER10 and soon POWER11 chips. 12 channels of DDR5 per socket is difficult and expensive to pull off, CXL would reduce the pin count per socket and provide more flexible IO simultaneously. Yes there is a performance hit vs. a native wider solution but this is is a fair trade of when looking at memory capacity and system scalability.

By: Name

Name — Tue, 17 Dec 2024 06:30:46 +0000

CXL memory will go the same way as Optane – lot of hype and hope, only to realize the real world gain is not there, noone wants to deal with two-tier RAM and failing DDR4 impact stability. All at a time when CPUs are mostly bottlenecked by memory throughput, lets use low throughput memory with worse reliability, what could go wrong.
Looks great in tests and powerpoint, will be sunk invest.

By: Kevin G

Kevin G — Mon, 16 Dec 2024 18:34:20 +0000

The big thing is the inline compression and encryption of the memory. Say you put 512 GB of DDR4 on it and you could leverage it as 1 TB on a new system supporting CXL. Not a bad use-case for the older DDR4 if you invested heavily into higher capacity modules. Similarly this would be good if Optane DIMMs could be leveraged with these CXL carriers.

While I get the desire to leverage standard PCIe 16x slots of these cards, I think it is time to explore MCIO connectors more of these types of devices. Being able to put 8 slots on a single card does not fit cleanly into any normal form factor.

By: Patrick Kennedy

Patrick Kennedy — Mon, 16 Dec 2024 15:28:13 +0000

Oarman – That would be true, but NVIDIA does not support CXL even on its Grace Superchip at this point.

By: Oarman

Oarman — Mon, 16 Dec 2024 13:29:53 +0000

“It feels a lot like this is a design for a hyper-scaler since it allows the hyper-scaler to deploy a base CPU design, then add additional compute and memory as needed.”

Presumably you wouldn’t even need to do this, you could start with a self-hosted NIC like the Bluefield-3 looked at a few weeks ago, and then add the compute / memory via CXL.